Synopsys was among the first companies to integrate general AI capabilities into its electronic design automation (EDA) suite in 2021– 2024, and by now hundreds, or even thousands of chips, have been designed using AI-enhanced tools. This week, Synopsys introduced a broad upgrade to its semiconductor design platform by embedding generative AI capabilities across its EDA offerings with the aim of shortening development cycles, improving engineer productivity, and enabling complex designs by understaffed teams.
Synopsys already has an EDA toolset capable of covering every stage of chip development, including IP verification (VSO.ai), analog verification (ASO.ai), RTL synthesis, floor planning, place and route (DSO.ai), 3D integration (3DSO.ai), and final functional verification (TSO.ai). The company also has data analytics tools Design.da, Fab.da, and Silicon.da.
The company is now adding Synopsys.ai Copilot features — including Assistive and Creative tools — into its portfolio to further speed up chip development. Assistive features act as a sidekick that aims to help engineers work faster and more independently by streamlining tool usage, automating routine tasks, and reducing reliance on expert support.
Creative features — which are in the early stage of development and are used by select clients only — are designed to automatically generate design and verification content, such as RTL code, testbenches, and assertions, to accelerate development cycles and boost engineering productivity.
A sidekick
Perhaps the most important Assistive capability is Knowledge Assistance that provides real-time access to technical documentation, tool guidance, and expert content directly within the Synopsys environment. As a result, instead of spending hours searching manuals or waiting for expert input, engineers can retrieve relevant answers in minutes. Streamlined access to knowledge leads to a 30% improvement in onboarding speed for junior engineers, according to Synopsys. The Knowledge Assistance is available on Synopsys Cloud and has already been adopted by over 100 startups to increase their productivity and accelerate project timelines.
In addition, there is Workflow Assistance that is designed to speed up repetitive scripting and automation tasks, which, on average, reduces time-to-solution by two times, and when applied in tools like Synopsys PrimeTime, it can generate scripts 10 to 20 times faster than manually, according to Synopsys. Finally, there is Run Assistance, which probably helps users execute commands or tool flows faster, though Synopsys does not reveal many details here, so we can only speculate what exactly this one does.
A builder
If Assistive capabilities can be called a ‘sidekick,’ then Creative features can be called a ‘builder’ as they indeed can create and, to some degree, lower reliance on humans for design and verification.
Synopsys’ GenAI copilots can generate RTL code and formal assertions to reduce the time required for design and verification and let engineers focus on higher-level tasks while maintaining high output quality. There is a catch, though: these tools are not perfect yet. Synopsys’s Assertion assistant features 80% syntax accuracy and 70% functional accuracy.
- This means that 8 out of every 10 formal assertions generated by Synopsys.ai Copilot are free of syntax errors and can be successfully processed and understood by formal verification tools (which require 100% syntax accuracy) without modification. However, 2 out of 10 formal assertions need fixes, and for now, Synopsys isn’t disclosing if they require significant fixes in these particular cases.
- Synopsys.ai Copilot also produces assertions that are functionally correct (i.e., they correctly describe the intended behavior of the design) in about 70% of cases, so the majority are usable for actual verification, but 30% need review or adjustments.
In general, the 80% assertions generated by Synopsys.ai Copilot work out of the box, and 70% of them do what they are meant to do, which the company says significantly speeds up the verification process. However, human oversight is still required.
Synopsys says that its Copilot.ai Creative tools are currently being used by early access customers to shrink cycles that once took days into hours or even minutes, according to Synopsys. For example, a major contract designer of chips was able to complete validation of 10 design components in just 10 days, which is a good result. However, while the set of tools shrinks design time and lowers requirements for the number of engineers involved in a project, they do not lower requirements for their qualification and certainly do not replace them. From this perspective, Synopsys.ai Copilot is not yet a ChatGPT for designing chips.
“AI is revolutionizing every layer of chip design and fueling a wave of ingenuity to deliver the next generation of advanced SoCs,” said Sanjay Bali, Senior Vice President, Strategy and Product Management, Synopsys. “With Synopsys.ai Copilot capabilities now supporting assistive and creative capabilities across the chip design flow and delivering significant customer impact, we are empowering engineering teams to increase the quality of designs, free their time for additional high-value opportunities, and accelerate technology innovation.”
With the takeover of Ansys, Synopsys is broadening its AI footprint into simulation and modeling. Ansys recently rolled out its Engineering Copilot, a virtual assistant — or sidekick — that gives users instant access to decades of accumulated simulation know-how to help engineers learn faster, solve problems more efficiently, and boost productivity using expert guidance within their workflow.
The newest Ansys release also brings enhancements to SimAI, a domain-independent simulation tool that weds Ansys’s high-precision modeling with AI-driven speed. SimAI now works together with Ansys optiSLang to speed up dataset creation and AI training to enable engineers to explore more design options and reduce development time.
Machines building machines?
In a longer-term move, Synopsys is collaborating with Microsoft to develop AgentEngineer, a multi-agent AI system designed to gradually take over entire engineering flows, which will essentially enable machines to design chips, leaving few phases and workloads to humans.
The project targets a roadmap from simple automated tasks (L2) to adaptive flow control (L4) and eventually autonomous decision-making (L5). The system is being built on Microsoft’s Discovery platform and was recently demonstrated at DAC 2025.
But humans will continue to define them
Synopsys has certainly come a long way in terms of injecting AI into chip design flow and its future goal is to largely make chip design an autonomous process. What does this leave for human engineers?
Development of architectures and microarchitectures — tasks that are considered as the intersection of technology and art — are usually developed by small groups of experienced people who think both inside and outside the box and consider a broader industry picture when laying architectural groundwork. For now, software like Synopsys.ai does not have access to vast amounts of data outside of the semiconductor industry that Synopsys serves, whereas LLMs like OpenAI’s ChatGPT are not yet capable of solving engineering problems. To that end, people will still be better at architecture and microarchitecture designs than machines.
However, when it comes to actual implementation, AI may help quite a lot as architectural decisions involve many variables like cache size, memory interfaces, and configurations. AI can accelerate this phase by quickly scanning the design space and identifying optimal parameters using its computational power. Additionally, when working alongside experienced architects, AI serves as a support tool, narrowing down complex trade-offs, such as power versus performance, and presenting refined options based on the experiences it was trained on. This helps architects choose the best setup for a given workload more efficiently, but certainly does not eliminate them from final decision-making.
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